仅对英特尔可见 — GUID: kkt1553539735150
Ixiasoft
2.3.2. 内部时钟和输出时钟
Internal Clocks and Output Clocks选项卡由5个子部分组成:Main PLL Output Clocks – Desired Frequencies,HPS to FPGA User Clocks,HPS Peripheral Clocks – Desired Frequencies,Clock Sources和PLL Report。
图 16. Platform Designer 内部时钟和输出时钟子选项卡