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1. 关于本文档
2. 引言
3. 入门
4. 安装OPAE 软件包
5. 识别Flash映像和BMC固件
6. 运行FPGA诊断
7. 在非虚拟环境中运行OPAE
8. 在虚拟环境中运行OPAE
9. 面向采用Intel Arria 10 GX FPGA的Intel可编程加速卡的Intel加速堆栈快速入门指南文档存档
10. 面向采用Intel Arria 10 GX FPGA的Intel可编程加速卡的Intel加速堆栈快速入门指南文档修订历史
A. 更新FIM和BMC固件
B. 处理正常的热关机
C. FPGA器件访问权限
D. Memlock限制
E. hugepage设置
F. 解决常见问题(FAQ)
G. 可用于 Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs 1.2.1 Release的文档
仅对英特尔可见 — GUID： vys1522371975167
Ixiasoft
G. 可用于 Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs 1.2.1 Release的文档
以下文档位于Intel FPGA网页上。要访问文档，请单击链接。
| 文档 | 访问文档的链接 |
|---|---|
| 10 Gbps Ethernet AFU Design Example User Guide | 10 Gbps Ethernet Accelerator Functional Unit (AFU) Design Example User Guide |
| 40 Gbps Ethernet AFU Design Example User Guide | 40 Gbps Ethernet Accelerator Functional Unit (AFU) Design Example User Guide |
| Open Programmable Acceleration Engine (OPAE) C API Programming Guide | GitHub Link |
| Open Programmable Acceleration Engine (OPAE) Linux Device Driver Architecture Guide | GitHub Link |
| Open Programmable Acceleration Engine (OPAE) Tools Guide | GitHub Link |
| Intel® Accelerator Functional Unit (AFU) Simulation Environment (ASE) User Guide | GitHub Link |
| Intel® Accelerator Functional Unit (AFU) Simulation Environment (ASE) Quick Start User Guide | Intel® Accelerator Functional Unit (AFU) Simulation Environment (ASE) Quick Start User Guide |
| Acceleration Stack for Intel® Xeon® CPU with FPGAs Core Cache Interface (CCI-P) Reference Manual | Acceleration Stack for Intel® Xeon® CPU with FPGAs Core Cache Interface (CCI-P) Reference Manual |
| Accelerator Functional Unit (AFU) Developer User Guide | |
| Streaming DMA Accelerator Functional Unit (AFU) User Guide | Streaming DMA Accelerator Functional Unit AFU User Guide |
| Native Loopback Accelerator Functional Unit (AFU) User Guide | Native Loopback Accelerator Functional Unit (AFU) User Guide |
| Networking Interface for Open Programmable Acceleration Engine (OPAE): Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA , previously known as HSSI User Guide for Intel® FPGAProgrammable Acceleration Card (Intel® FPGA PAC) Intel® Arria® 10 GX FPGA | Networking Interface for Open Programmable Acceleration Engine (OPAE): Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA |
| OpenCL* on Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA Quick Start User Guide | |
| Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA with Intel® Arria® 10 GX FPGA Datasheet | Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA with Intel® Arria® 10 GX FPGA Datasheet |
| Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs v1.2.1 Release Notes | Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs v1.2.1 Release Notes |
| Security User Guide: Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA | Security User Guide: Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA |