Board Management Controller,
Intel®
MAX® 10 NIOS FW version D.2.0.19
Board Management Controller,
Intel®
MAX® 10 Build version D.2.0.6
//****** FME ******//
Object Id : 0xEF00000
PCIe s:b:d.f : 0000:b2:00.0
Device Id : 0x0b30
Numa Node : 1
Ports Num : 01
Bitstream Id : 0x23000410010309
Bitstream Version : 0.2.3
Pr Interface Id : a5d72a3c-c8b0-4939-912c-f715e5dc10ca
Boot Page : user
Board Management Controller,
Intel®
MAX® 10 NIOS FW version D.2.0.19
Board Management Controller,
Intel®
MAX® 10 Build version D.2.0.6
//****** PORT ******//
Object Id : 0xEE00000
PCIe s:b:d.f : 0000:b2:00.0
Device Id : 0x0b30
Numa Node : 1
Ports Num : 01
Bitstream Id : 0x23000410010309
Bitstream Version : 0.2.3
Pr Interface Id : a5d72a3c-c8b0-4939-912c-f715e5dc10ca
Accelerator Id : 9aeffe5f-8457-0612-c000-c9660d824272
Board Management Controller,
Intel®
MAX® 10 NIOS FW version D.2.0.19
Board Management Controller,
Intel®
MAX® 10 Build version D.2.0.6
//****** TEMP ******//
Object Id : 0xEF00000
PCIe s:b:d.f : 0000:b2:00.0
Device Id : 0x0b30
Numa Node : 1
Ports Num : 01
Bitstream Id : 0x23000410010309
Bitstream Version : 0.2.3
Pr Interface Id : a5d72a3c-c8b0-4939-912c-f715e5dc10ca
(12) FPGA Die Temperature : 73.50 Celsius
(13) Board Temperature : 46.50 Celsius
(15) QSFP0 Temperature : N/A
(38) QSFP1 Temperature : N/A
(44) PKVL0 Core Temperature : 73.50 Celsius
(45) PKVL0 SerDes Temperature : 73.50 Celsius
(46) PKVL1 Core Temperature : 74.00 Celsius
(47) PKVL1 SerDes Temperature : 74.50 Celsius
Board Management Controller,
Intel®
MAX® 10 NIOS FW version D.2.0.19
Board Management Controller,
Intel®
MAX® 10 Build version D.2.0.6
//****** POWER ******//
Object Id : 0xEF00000
PCIe s:b:d.f : 0000:b2:00.0
Device Id : 0x0b30
Numa Node : 1
Ports Num : 01
Bitstream Id : 0x23000410010309
Bitstream Version : 0.2.3
Pr Interface Id : a5d72a3c-c8b0-4939-912c-f715e5dc10ca
( 1) Board Power : 74.81 Watts
( 2) 12V Backplane Current : 3.27 Amps
( 3) 12V Backplane Voltage : 12.16 Volts
( 4) 1.2V Voltage : 1.19 Volts
( 6) 1.8V Voltage : 1.80 Volts
( 8) 3.3V Voltage : 3.25 Volts
(10) FPGA Core Voltage : 0.90 Volts
(11) FPGA Core Current : 18.51 Amps
(14) QSFP0 Supply Voltage : 0.00 Volts
(24) 12V AUX Current : 2.88 Amps
(25) 12V AUX Voltage : 12.19 Volts
(37) QSFP1 Supply Voltage : 0.00 Volts
Board Management Controller,
Intel®
MAX® 10 NIOS FW version D.2.0.19
Board Management Controller,
Intel®
MAX® 10 Build version D.2.0.6
//****** FME ERRORS ******//
Object Id : 0xEF00000
PCIe s:b:d.f : 0000:b2:00.0
Device Id : 0x0b30
Numa Node : 1
Ports Num : 01
Bitstream Id : 0x23000410010309
Bitstream Version : 0.2.3
Pr Interface Id : a5d72a3c-c8b0-4939-912c-f715e5dc10ca
PCIe0 Errors : 0x0
PCIe1 Errors : 0x0
Catfatal Errors : 0x0
Seu Emr : 0x0
Inject Error : 0x0
Nonfatal Errors : 0x0
Next Error : 0x0
First Error : 0x0
Errors : 0x0
Board Management Controller,
Intel®
MAX® 10 NIOS FW version D.2.0.19
Board Management Controller,
Intel®
MAX® 10 Build version D.2.0.6
//****** PORT ERRORS ******//
Object Id : 0xEE00000
PCIe s:b:d.f : 0000:b2:00.0
Device Id : 0x0b30
Numa Node : 1
Ports Num : 01
Bitstream Id : 0x23000410010309
Bitstream Version : 0.2.3
Pr Interface Id : a5d72a3c-c8b0-4939-912c-f715e5dc10ca
Accelerator Id : 9aeffe5f-8457-0612-c000-c9660d824272
First Malformed Req : 0x0
First Error : 0x0
Errors : 0x0
Board Management Controller,
Intel®
MAX® 10 NIOS FW version D.2.0.19
Board Management Controller,
Intel®
MAX® 10 Build version D.2.0.6
//****** PHY ******//
Object Id : 0xEF00000
PCIe s:b:d.f : 0000:b2:00.0
Device Id : 0x0b30
Numa Node : 1
Ports Num : 01
Bitstream Id : 0x23000410010309
Bitstream Version : 0.2.3
Pr Interface Id : a5d72a3c-c8b0-4939-912c-f715e5dc10ca
//****** PHY GROUP 0 ******//
Direction : Line side
Speed : 25 Gbps
Number of PHYs : 4
//****** PHY GROUP 1 ******//
Direction : Host side
Speed : 40 Gbps
Number of PHYs : 4
//****** Intel C827 Retimer ******//
Port0 25G : Up
Port1 25G : Up
Port2 25G : Up
Port3 25G : Up
Retimer A Version : 101c.1064
Retimer B Version : 101c.1064
Board Management Controller,
Intel®
MAX® 10 NIOS FW version D.2.0.19
Board Management Controller,
Intel®
MAX® 10 Build version D.2.0.6
//****** MAC ******//
Object Id : 0xEF00000
PCIe s:b:d.f : 0000:b2:00.0
Device Id : 0x0b30
Numa Node : 1
Ports Num : 01
Bitstream Id : 0x23000410010309
Bitstream Version : 0.2.3
Pr Interface Id : a5d72a3c-c8b0-4939-912c-f715e5dc10ca
Number of MACs : 8
MAC address 0 : 64:4c:36:00:16:e0
MAC address 1 : 64:4c:36:00:16:e1
MAC address 2 : 64:4c:36:00:16:e2
MAC address 3 : 64:4c:36:00:16:e3
MAC address 4 : 64:4c:36:00:16:e4
MAC address 5 : 64:4c:36:00:16:e5
MAC address 6 : 64:4c:36:00:16:e6
MAC address 7 : 64:4c:36:00:16:e7
found the NLB offset=0x28000
Cachelines Read_Count Write_Count Cache_Rd_Hit Cache_Wr_Hit Cache_Rd_Miss Cache_Wr_Miss Eviction 'Clocks(@200 MHz)' Rd_Bandwidth Wr_Bandwidth
1024 97676676 97675844 0 0 0 0 0 200028728 6.250 GB/s 6.250 GB/s
VH0_Rd_Count VH0_Wr_Count VH1_Rd_Count VH1_Wr_Count VL0_Rd_Count VL0_Wr_Count
97676676 97675845 0 0 0 0
found the NLB offset=0x28000
Cachelines Read_Count Write_Count Cache_Rd_Hit Cache_Wr_Hit Cache_Rd_Miss Cache_Wr_Miss Eviction 'Clocks(@200 MHz)' Rd_Bandwidth Wr_Bandwidth
1024 97665536 97664692 0 0 0 0 0 200027985 6.250 GB/s 6.250 GB/s
VH0_Rd_Count VH0_Wr_Count VH1_Rd_Count VH1_Wr_Count VL0_Rd_Count VL0_Wr_Count
97665536 97664693 0 0 0 0
found the NLB offset=0x28000
Cachelines Read_Count Write_Count Cache_Rd_Hit Cache_Wr_Hit Cache_Rd_Miss Cache_Wr_Miss Eviction 'Clocks(@200 MHz)' Rd_Bandwidth Wr_Bandwidth
1024 97661776 97660924 0 0 0 0 0 200030859 6.249 GB/s 6.249 GB/s
VH0_Rd_Count VH0_Wr_Count VH1_Rd_Count VH1_Wr_Count VL0_Rd_Count VL0_Wr_Count
97661780 97660925 0 0 0 0
found the NLB offset=0x28000
Cachelines Read_Count Write_Count Cache_Rd_Hit Cache_Wr_Hit Cache_Rd_Miss Cache_Wr_Miss Eviction 'Clocks(@200 MHz)' Rd_Bandwidth Wr_Bandwidth
1024 97641100 97640260 0 0 0 0 0 200027828 6.248 GB/s 6.248 GB/s
VH0_Rd_Count VH0_Wr_Count VH1_Rd_Count VH1_Wr_Count VL0_Rd_Count VL0_Wr_Count
97641100 97640261 0 0 0 0
Running test in HW mode
Buffer Verification Success!
Buffer Verification Success!
Running DDR sweep test
Buffer pointer = 0x7f1204dfc000, size = 0x100000000 (0x7f1204dfc000 through 0x7f1304dfc000)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 6079.116050 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 6648.719007 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
DDR sweep with unaligned pointer and size
Buffer pointer = 0x7f12057fd03d, size = 0xffffffbe (0x7f12057fd03d through 0x7f13057fcffb)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 6077.252495 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 6606.536954 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7f12057fd003, size = 0xfffffffd (0x7f12057fd003 through 0x7f13057fd000)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 6077.917447 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 6600.669144 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7f12057fd007, size = 0xfffffff6 (0x7f12057fd007 through 0x7f13057fcffd)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 6077.249565 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 6599.379119 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7f12057fd000, size = 0xfffffffd (0x7f12057fd000 through 0x7f13057fcffd)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 6079.961435 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 6639.524496 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7f12057fd000, size = 0xffffffc3 (0x7f12057fd000 through 0x7f13057fcfc3)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 6078.064773 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 6728.900022 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7f12057fd000, size = 0xfffffff9 (0x7f12057fd000 through 0x7f13057fcff9)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 6082.346431 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 6722.463627 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Running test in HW mode
Buffer Verification Success!
Buffer Verification Success!
Running DDR sweep test
Buffer pointer = 0x7f7a5abfc000, size = 0x100000000 (0x7f7a5abfc000 through 0x7f7b5abfc000)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 6079.671455 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 6654.373365 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
DDR sweep with unaligned pointer and size
Buffer pointer = 0x7f7a5b5fd03d, size = 0xffffffbe (0x7f7a5b5fd03d through 0x7f7b5b5fcffb)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 6078.450083 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 6676.330310 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7f7a5b5fd003, size = 0xfffffffd (0x7f7a5b5fd003 through 0x7f7b5b5fd000)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 6079.223431 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 6673.156991 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7f7a5b5fd007, size = 0xfffffff6 (0x7f7a5b5fd007 through 0x7f7b5b5fcffd)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 6082.227028 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 6664.409925 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7f7a5b5fd000, size = 0xfffffffd (0x7f7a5b5fd000 through 0x7f7b5b5fcffd)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 6082.114956 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 6719.411365 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7f7a5b5fd000, size = 0xffffffc3 (0x7f7a5b5fd000 through 0x7f7b5b5fcfc3)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 6083.076700 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 6712.587358 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7f7a5b5fd000, size = 0xfffffff9 (0x7f7a5b5fd000 through 0x7f7b5b5fcff9)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 6083.303806 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 6716.590674 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Running test in HW mode
Buffer Verification Success!
Buffer Verification Success!
Running DDR sweep test
Buffer pointer = 0x7fc286bfc000, size = 0x40000000 (0x7fc286bfc000 through 0x7fc2c6bfc000)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 2502.886807 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 2581.081446 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
DDR sweep with unaligned pointer and size
Buffer pointer = 0x7fc2875fd03d, size = 0x3fffffbe (0x7fc2875fd03d through 0x7fc2c75fcffb)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 2502.966117 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 2581.055594 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7fc2875fd003, size = 0x3ffffffd (0x7fc2875fd003 through 0x7fc2c75fd000)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 2502.960558 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 2581.020016 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7fc2875fd007, size = 0x3ffffff6 (0x7fc2875fd007 through 0x7fc2c75fcffd)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 2503.483825 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 2582.389741 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7fc2875fd000, size = 0x3ffffffd (0x7fc2875fd000 through 0x7fc2c75fcffd)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 2502.961054 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 2580.327886 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7fc2875fd000, size = 0x3fffffc3 (0x7fc2875fd000 through 0x7fc2c75fcfc3)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 2479.009733 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 2581.453682 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7fc2875fd000, size = 0x3ffffff9 (0x7fc2875fd000 through 0x7fc2c75fcff9)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 2476.627081 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 2581.714146 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Running test in HW mode
Buffer Verification Success!
Buffer Verification Success!
Running DDR sweep test
Buffer pointer = 0x7f18ce9fc000, size = 0x1000000 (0x7f18ce9fc000 through 0x7f18cf9fc000)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 933.216916 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 910.980582 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
==========================================================
Beginning FPGA Built-In Self-Test
==========================================================
Running mode: nlb
Running fpgadiag lpbk1 vh0-vh0 test...
Running fpgadiag lpbk1 vh0-vh1 test...
Running fpgadiag lpbk1 vh1-vh0 test...
Running fpgadiag lpbk1 vh1-vh1 test...
Finished Executing NLB (FPGA DIAG) Tests
Running mode: dma_afu
Running fpga_dma_test test on DDR4_A...
Running fpga_dma_test test on DDR4_B...
Running fpga_dma_test test on DDR4_C...
Running fpga_dma_test test on QDR...
Finished Executing DMA Tests
Built-in Self-Test Completed.