Altera® University Program Teaching Materials
Workshops
Learn the basics of designing custom logic on Altera® FPGA technology with these project-based workshops. Each workshop contains lecture slides plus multiple labs and exercises designed for new users. To be successful, first read or watch the lecture material, and then complete the associated projects.
Required Hardware
A laptop or desktop computer with a USB port
An Altera FPGA development kit from Terasic
Students and professors can receive an academic discount through our partner, Terasic.
Note Most workshops are based on the Terasic DE10-Lite but can be adapted for other Altera FPGA development kits with similar features, unless stated otherwise.
Introduction to FPGA Design Using the Quartus® Prime Software Suite
Explore the features of Quartus® Prime Software Suite through the creation of simple FPGA designs. Learn how FPGAs work and write Verilog code to implement your first custom logic project.
Prerequisites: Boolean algebra, combinational logic, sequential logic, basic coding
Required Hardware: Terasic DE10-Lite
Embedded FPGA Design Using the Nios® II Processor
Use Platform Designer to build a customized embedded system using a soft processor. Write bare-metal software using the open source Eclipse* IDE. Interact with an I/O peripheral using functions from the Nios II Hardware Abstraction Layer (HAL).
Prerequisites: Computer organization, software development in C
Required Hardware: Terasic DE10-Lite
Introduction to Static Timing Analysis of Digital Circuits
Calculate timing margins by completing paper and pencil exercises. Practice writing, analyzing, and correcting constraints using the Timing Analysis tool within the Quartus Prime Software Suite.
Prerequisites: Digital logic design, computer architecture
No hardware required
Introduction to FPGA Simulation and Debug
Learn how to simulate and debug digital designs. Practice debugging real systems using tools in the Quartus Prime Software Suite, such as ModelSim*, SignalTap, System Console, and In-System Sources and Probes Editor.
Prerequisites: Timing analysis
Required Hardware: Terasic DE10-Lite
Introduction to High-Speed I/O
Learn about the importance of high-speed serializer and deserializer transceiver circuits by configuring, assembling, simulating, and testing your own transceiver bidirectional channel.
Prerequisites: Digital logic design, computer architecture
Note This workshop requires specialty transceiver hardware not found in the Terasic DE10-Lite, Terasic DE10-Nano, or Terasic DE1-SoC kits.
Hardware Required: Cyclone® V FPGA GX Starter Kit from Terasic
Introduction to Memory
Use internal and external memory structures to build an efficient design. Configure, assemble, and benchmark on-chip dual port RAM, single port ROM, and external SDRAM.
Prerequisites: Digital logic design, computer architecture, Verilog, or VHDL
Required Hardware: Terasic DE10-Lite
Introduction to High-Level Design
Learn how to use C derivatives, such as OpenCL™ software technology and the High Level Synthesis Compiler, to describe FPGA designs without hardware description languages. Discover how to increase your productivity by building a computationally rich workload using Quartus Prime Software Suite, ModelSim, and the HLS Compiler.
Prerequisites: Digital logic design, computer architecture, coding in C and C++
No hardware required
Introduction to FPGA Acceleration
Learn how to develop and deploy FPGAs for workload optimization in data center and cloud environments using the acceleration stack for Intel® Xeon® CPU with FPGAs. Practice writing host code that communicates transparently with the FPGA accelerator using the Open Programmable Acceleration Engine (OPAE).
Prerequisites: Coding in C and C++
No hardware required