Course DescriptionThis training is a recording of the “Getting to Timing Closure Faster Office Hours” session held on 2/23/2021. Office Hours give you the opportunity to ask questions directly to an Intel FPGA expert and learn from others’ questions. In this Office Hours session, Intel FPGA Training Engineer Steven Elzinga answers questions about timing analysis and timing closure in the Intel Quartus® Prime software.
At Course Completion
You will be able to:
> Know about aspects of timing analysis and closure based on user questions
> Basic understanding of the use of the Intel Quartus Prime software
Applicable Training Curriculum
This course is part of the following Intel FPGA training curriculum: