文档: DSP

Evolutions in technology are improving beyond traditional programmable digital signal processing (DSP) device capabilities. The degree of flexibility offered by programmable logic and the associated throughput benefits make FPGAs and PLDs increasingly attractive alternatives for performance-hungry applications.

In modern multi-channel systems, where similar data arrives at very high sampling rates and is subject to simultaneous algorithmic transformations, FPGA implementations with high I/O rates and parallel structures provide a tangible benefit at a fraction of the cost of a multi-processor-based DSP approach.

Altera’s set of DSP documentation presents the design flow commonly used in the FPGA design community. To download the DSP Builder Handbook, click the link below.

 

DSP Builder Handbook (26 MB)

I. DSP Builder Handbook

II. DSP Design Building Blocks

III. 硬件开发

IV. Device Selection and Architecture

DSP Blocks in Stratix IV Devices (ver 3.1, Feb 2011, 1 MB)

Variable Precision DSP Blocks in Stratix V Devices (ver 1.4, Jun 2012, 1 MB)

DSP Blocks in Arria II Devices (ver 4.0, Dec 2010, 1 MB)

Embedded Multipliers in Cyclone IV Devices (ver 1.1, Jan 2010, 133 KB)

V. DSP Applications Using FPGAs

VI. 参考设计

VII. 勘误表