High-Speed Reed Solomon Intel® FPGA IP Core

The High-Speed Reed-Solomon Intel® FPGA IP core uses a large parallel architecture to achieve a large throughput for applications that require 100 Gbps. The IP core is suitable for 10G (such as OTN) or 100G Ethernet (IEEE 802.3bj/bm) applications.

The High-Speed Reed-Solomon Intel FPGA IP core has the following features:

  • Fully parameterizable:
    • Number of bits per symbol
    • Number of symbols per codeword
    • Number of check symbols per codeword
    • Field polynomial
  • Avalon® Streaming (Avalon-ST) interfaces
  • Testbenches to verify the intellectual property (IP) core
  • IP functional simulation models for use in Intel FPGA-supported VHDL and Verilog HDL simulators

Typical expected performance and utilization figures for this IP core are provided in the High-Speed Reed-Solomon IP Core User Guide.

For technical support on this IP core, please visit Intel Premier Support. You may also search for related topics on this function in the Knowledge Center.