Intel® Fortran Compiler 18.0 for Linux* Release Notes for Intel® Parallel Studio XE 2018

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已更新 6/11/2019
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This document provides a summary of new and changed product features and includes notes about features and problems not described in the product documentation. 

Please see the licenses included in the distribution as well as the Disclaimer and Legal Information section of these release notes for details. Please see the following links for information on this release of the Intel® Fortran Compiler 18.0.

Change History

This section highlights important changes from the previous product version and changes in product updates.

Changes in Update 5 (Intel® Fortran Compiler 18.0.6)

  • Intel® Parallel Studio XE 2018 Update 5 Composer Edition has been updated to include more recent versions of 3rd party components, which include functional and security updates. Users should update to the latest version.

    NOTE:  Although the Intel® Parallel Studio XE 2018 installer package for this update release is Update 5, the actual compiler package within this Intel® Parallel Studio XE 2018 Update 5 installation package is the Intel® Compilers 2018 Update 6 component and NOT an Update 5 component.  So you will see the Intel® Compilers 2018 Update 6 and not Update 5 in this installer package.  The compiler(s) will also identify as 2018 Update 6.  Be assured that the 2018.6.xxx directories and product versions 18.0.6 in packages you see during installation from the Intel® Parallel Studio XE 2018 Update 5 release are correct and are for the Intel® Compilers 2018 Update 6 component.  We apologize for the confusion in the update numbering between the enclosing Intel® Parallel Studio XE 2018 Update 5 package and the actual Intel® Compilers 2018 Update 6 which is installed and is to be used for this update. 

Changes in Update 4 (Intel® Fortran Compiler 18.0.4)

  • Corrections to reported problems

Changes in Update 3 (Intel® Fortran Compiler 18.0.3)

Changes in Update 2 (Intel® Fortran Compiler 18.0.2)

Changes in Update 1 (Intel® Fortran Compiler 18.0.1)

  • First update with Japanese Localization
  • Corrections to reported problems

Changes since Intel® Fortran Compiler 17.0 (New in Intel® Fortran Compiler 18.0.0)

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System Requirements

For an explanation of architecture names, see Intel® Architecture Platform Terminology

  • A PC based on an Intel® 64 architecture processor supporting the Intel® Streaming SIMD Extensions 2 (Intel® SSE2) instructions (Intel® 2nd Generation or newer Generation of Intel® Core™ i3, i5, or i7 processors and Intel® Xeon® E3 or E5 processor family, or compatible non-Intel processor)
    • Development of 64-bit applications, and those that offload work to Intel® Xeon Phi™ processors, is supported on a 64-bit version of the OS only.  Development of 32-bit applications is supported on a 64-bit version of the OS only.
    • Development for a 32-bit on a 64-bit host may require optional library components (ia32-libs, lib32gcc1, lib32stdc++6, libc6-dev-i386, gcc-multilib, g++-multilib) to be installed from your Linux distribution.
  • For the best experience, a multi-core or multi-processor system is recommended
  • 2GB of RAM (4GB recommended)
  • 4GB free disk space for all features
  • For Intel® Xeon Phi™ x200 product family development/testing:
    • Intel® Xeon Phi™ processor x200 product family (formerly code named Knights Landing)
    • Intel® Xeon Phi™ Processor Software for Intel® Xeon Phi™ processor x200 product family
  • For development of IA-32 or Intel® 64 architecture applications, one of the following Linux distributions (this is the list of distributions tested by Intel; other distributions may or may not work and are not recommended - please refer to Technical Support if you have questions):
    • Debian* 7.0, 8.0, 9.0
    • Fedora* 24, 25, 26
    • Red Hat Enterprise Linux* 6, 7
    • SuSE LINUX Enterprise Server* 11 (SP4),12 (SP2)
    • Ubuntu* 14.04 LTS, 15.10, 16.04 LTS, 16.10, 17.04
    • Intel® Cluster Ready
  • Linux Developer tools component installed, including gcc, g++ and related tools. (this is the list of component versions tested by Intel; other versions may or may not work and are not recommended - please refer to Technical Support if you have questions
    • gcc 4.3 to gcc 6
    • binutils 2.20 to binutils 2.26
  • Library libunwind.so is required in order to use the –traceback option.  Some Linux distributions may require that it be obtained and installed separately.

Notes

  • The Intel® compilers are tested with a number of different Linux distributions, with different versions of gcc. Some Linux distributions may contain header files different from those we have tested, which may cause problems. The version of glibc you use must be consistent with the version of gcc in use. For best results, use only the gcc versions as supplied with distributions listed above.
  • Compiling very large source files (several thousands of lines) using advanced optimizations such as -O3, -ipo and -qopenmp, may require substantially larger amounts of RAM.
  • Some optimization options have restrictions regarding the processor type on which the application is run. Please see the documentation of these options for more information.

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Intel® Xeon Phi™ Processor Software

Intel® Xeon Phi™ Processor Software is a set of software and utilities that enable functionalities of the Intel® Xeon Phi™ Processor. The Intel® Xeon Phi™ Processor Software may be installed before or after installing the Intel® Fortran Compiler, if you will be developing applications that use Intel® Xeon Phi™ processor product family x200 (formerly code named Knights Landing).

Using the latest version of Intel® Xeon Phi™ Processor Software is recommended. Refer to the Intel® Xeon Phi™ Processor Software documentation for details.

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How to use the Intel® Fortran Compiler

Intel® Parallel Studio XE 2018: Getting Started with the Intel® Fortran Compiler 18.0 for Linux* at <install-dir>/documentation_2018/en/compiler_f/ps2018/get_started_lf.htm contains information on how to use the Intel® Fortran Compiler.

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Documentation

Product documentation is linked from <install-dir>/documentation_2018/en/compiler_f/ps2018/get_started_lf.htm.

Offline Core Documentation Removed from the Installed Image

Offline core documentation is removed from the Intel® Parallel Studio XE installed image. The core documentation for the components of Intel® Parallel Studio XE are available at the Intel® Software Documentation Library for viewing online. You can also download an offline version of the documentation from the Intel® Software Development Products Registration Center: Product List > Intel® Parallel Studio XE Documentation.

User and Reference Guides, What's New and Release Notes, Installation Guides

Refer to the Intel® Parallel Studio XE Support – Documentation for additional User and Reference Guides, What’s New and Release Notes, and Installation Guides.

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Japanese Language Support

Japanese language support is not provided with this release of the product.

If you wish to use Japanese-language support on an English-language operating system, or English-language support on a Japanese-language operating system, you will find instructions at Changing Language Setting to see English on a Japanese OS environment or Vice Versa on Linux*.

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Intel-provided debug solutions

Intel®-provided debug solutions are based GNU* GDB.  Please see Intel® Parallel Studio 2018 Composer Edition Fortran - Debug Solutions Release Notes for further information.

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Samples

Product samples are now available online at Intel® Software Product Samples and Tutorials.

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Redistributable Libraries

Refer to the Redistributable Libraries for Intel® Parallel Studio XE for more information.

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Technical Support

Register your license at the Intel® Software Development Products Registration Center. Registration entitles you to free technical support, product updates and upgrades for the duration of the support term.

For information about how to find Technical Support, Product Updates, User Forums, FAQs, tips and tricks, and other support information, please visit: http://www.intel.com/software/products/support/

Note: If your distributor provides technical support for this product, please contact them for support rather than Intel.

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Compatibility

In general, object code and modules compiled with earlier versions of Intel Fortran Compiler for Linux* (8.0 and later) may be used in a build with version 18.0. Exceptions include:

  • Sources that use the CLASS keyword to declare polymorphic variables and which were built with a compiler version earlier than 12.0 must be recompiled.
  • Objects built with the multi-file interprocedural optimization (-ipo) option must be recompiled with the current version.
  • Objects that use the REAL(16), REAL*16, COMPLEX(16) or COMPLEX*32 datatypes and which were compiled with versions earlier than 12.0 must be recompiled.
  • Objects built for the Intel® 64 architecture with a compiler version earlier than 10.0 and that have module variables must be recompiled.  If non-Fortran sources reference these variables, the external names may need to be changed to remove an incorrect leading underscore.
  • Modules that specified an ATTRIBUTES ALIGN directive outside of a derived type and were compiled with versions earlier than 11.0 must be recompiled.  The compiler will notify you if this issue is encountered.
  • Modules that specified an ATTRIBUTES ALIGN directive inside a derived type declaration cannot be used by compilers older than 13.0.1.
  • The implementation of the Fortran 2008 submodules feature required extensive changes to the internal format of binary .mod files. Therefore module files created by the version 16.0 or newer Fortran compiler cannot be used with version 15.0 or older Fortran compilers.
  • Objects/libraries compiled/built for the Intel® Xeon Phi™ x100 product family are not compatible with objects/libraries compiled/built for the Intel® Xeon Phi™ x200 product family. 

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Stack Alignment Change for REAL(16) and COMPLEX(16) Datatypes

In versions prior to 12.0, when a REAL(16) or COMPLEX(16) (REAL*16 or COMPLEX*32) item was passed by value, the stack address was aligned at 4 bytes.  For improved performance, the version 12 and later compilers align such items at 16 bytes and expects received arguments to be aligned on 16-byte boundaries. This change is also compatible with gcc.

This change primarily affects compiler-generated calls to library routines that do computations on REAL(16) values, including intrinsics. If you have code compiled with earlier versions and link it with the version 12 libraries, or have an application linked to the shared version of the Intel run-time libraries, it may give incorrect results.

In order to avoid errors, you must recompile all Fortran sources that use the REAL(16) and COMPLEX(16) datatypes if they were compiled by compiler versions earlier than 12.0.

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New and Changed Features

The Intel® Fortran Compiler now supports all features from the Fortran 2008 standard. Additional Fortran 2008 features added in the Intel® Fortran 18.0 release are noted below. Please refer to the Fortran 2008 Standard (PDF) and the proposed draft Fortran 2015 Standard (PDF) if necessary.

Features from Fortran 2008

  • COMPILER_OPTIONS and COMPILER_VERSION in ISO_FORTRAN_ENV
  • COMPLEX arguments to trigonometric and hyperbolic intrinsic functions
  • FINDLOC intrinsic function
  • Optional argument BACK in MAXLOC and MINLOC intrinsic functions
  • Multiple type-bound procedures in a PROCEDURE list
  • Passing a non-pointer data item to a pointer dummy argument
  • Polymorphic assignment with allocatable Left Hand Side (LHS)
  • Allocatable components of recursive type and forward reference
  • Data statement restrictions removed

New and Changed Intel® Xeon Phi™ Offload Features

Intel continually evaluates the markets for our products in order to provide the best possible solutions to our customer’s challenges. As part of this on-going evaluation process Intel has decided to not offer Intel® Xeon Phi™ 7200 Coprocessor (codenamed Knights Landing Coprocessor) products to the market

  • Given the rapid adoption of Intel® Xeon Phi™ 7200 processors, Intel has decided to not deploy the Knights Landing Coprocessor to the general market.
  • Intel® Xeon Phi™ Processors remain a key element of our solution portfolio for providing customers the most compelling and competitive solutions possible.

Support for the Intel® Xeon Phi™ x100 product family coprocessor (formerly code name Knights Corner) is removed in this release. The Intel® Fortran Compiler now supports offload to Intel® Xeon Phi™ x200 processor-based system in a cluster configuration using the cluster fabric for communication. There are new and changed features associated with this support. 

Predefine macro changes for programs targeting Intel® Xeon Phi™ product family

New predefine macros  __AVX512F__  , __AVX512CD__  , __AVX512ER__  , __AVX512PF__  are available to support offload programs targeting Intel® Xeon Phi™ x200 product family.  Refer to the product documentation for details.

The predefine macros  __TARGET_ARCH_MIC  is defined for the target compilation.

The predefine macros   __k1om__  , __KNC__  , __KNC  , __MIC__  , __MIC   targeting the previous Intel® Xeon Phi™ coprocessor x100 product family are not defined for the target compilation beginning with this release.

Offload compilation target default changed

The -qoffload-arch compiler option default is changed in this release of the compiler to mic-avx512 to target the Intel® Xeon Phi™ x200 product family.

LD_LIBRARY_PATH 

The location of the target (Intel® Xeon Phi™ coprocessor x100 product family) libraries on the host are specified with the MIC_LD_LIBRARY_PATH environment variable and only host libraries with LD_LIBRARY_PATH.

Installed image directory changes

On Linux*, the “intel64_mic” folder is removed from under the linux/bin, linux/compiler/include and lib subdirectories of the installed image <install-dir>/compilers_and_libraries_2018/Linux.

New OFFLOAD_NODES environment variable

Within the cluster that uses offload over fabric, use OFFLOAD_NODES=<machines> to specify individual Intel® Xeon Phi™ x200 processor-based system available for offload, where <machines> is a comma-separated list of names or addresses.

Profile Guided Optimization Hardware-based Event Sampling

Profile Guided Optimization (PGO) Hardware-based event sampling is a new low overhead model to get (many) benefits of PGO using the Intel® Compiler and the Intel® VTune™ Amplifier. Data collection works on systems where Intel® VTune™ Amplifier is supported. Refer to each product’s User guide for additional information.

Features from OpenMP*

Language features for task reductions from the OpenMP* Technical Report 4 : Version 5.0 Preview 1 specifications are now supported.

TASKGROUP now has the TASK_REDUCTION clause.
TASK includes now has the IN_REDUCTION clause.
TASKLOOP now has the REDUCTION and IN_REDUCTION clauses.

New monotonic, overlap and lastprivate keywords for OpenMP* SIMD directive:

!$omp ordered simd overlap(overlap_index)
!$omp ordered simd monotonic([var:step]s)
!$omp simd lastprivate(conditional:[vars])

For more information, see the compiler documentation or the link to the OpenMP* Specification above.

 

New and Changed Directives

MEMKIND High-BandWidth Memory directive

The new MEMKIND directive Enables High Band Width (HBW) memory or non-HBW memory allocation for the lexically next ALLOCATE statement. This directive only applies to Intel® 64 architecture targeting the Intel® Xeon Phi™ x200 product family (formerly code name Knights Landing) and it is only available for Linux* systems

    !DIR$ MEMKIND:{DDR | HBW} [,ALIGN=n]

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New and Changed Compiler Options

Please refer to the compiler documentation for details

For a list of deprecated compiler options, see the Compiler Options section of the documentation.

New -qopenmp Compiler option replaces -openmp

To enable the OpenMP* feature, use -qopenmp. The compiler no longer accepts the previous spelling -openmp

Enhanced -init=[keyword] Compiler option

The option already allows scalars and arrays to be initialized with ZERO or SNAN.  Feature support extends this to HUGE and MINUS_HUGE {+/- largest representable integer or real}, TINY and MINUS_Tiny {+/- smallest representable integer or real}, and INFINITY and MINUS_INFINITY for +/- IEEE Infinity.

All –o* options replaced by –qo* options

All the –o* options deprecated in the previous release have been replaced with –qo* options in this release with one noted exception, there is no change to the –o option for Linux* and macOS* used to name the output file.

A new diagnostic is issued when any now replaced –o option is used. For example:

$ ifort -openmp example.f90
ifort: command line error: option '-openmp' is not supported. Please use the replacement option '-qopenmp'

Options affected:

-offload-attribute-target=<target>
-offload-option,<target>,<tool>,<opts>
-[no-]offload[=<arg>]
-[no-]openmp
-openmp-lib=<arg>
-openmp-link=<arg>
-[no-]openmp-offload
-[no-]openmp-simd
-openmp-stubs
-openmp-threadprivate=<arg>
-openmp-report[=<level>]
-openmp-task=<arg>
-opt-args-in-regs=<arg>
-[no-]opt-assume-safe-padding
-opt-block-factor=<arg>
-[no-]opt-calloc
-[no-]opt-class-analysis
-[no-]opt-dynamic-align
-[no-]opt-gather-scatter-unroll
-[no-]opt-jump-tables=<arg>
-opt-malloc-options=<arg>
-[no-]opt-matmul
-[no-]opt-mem-layout-trans=<arg>
-[no-]opt-multi-version-aggressive
-[no-]opt-prefetch[=<val>]
-opt-prefetch-distance=<arg>
-opt-ra-region-strategy[=<arg>]
-[no-]opt-report-embed
-opt-report-file=<arg>
-opt-report-filter=<arg>
-opt-report-format=<arg>
-opt-report-phase=<arg>
-opt-report-routine=<arg>
-opt-report-help
-opt-report[=<arg>]
-opt-report-per-object
-opt-streaming-cache-evict=<arg>
-opt-streaming-stores=<arg>
-[no-]opt-subscript-in-range
-opt-threads-per-core=<arg>

Changed  -qoffload-arch=[arch] Compiler Option Default

The -qoffload-arch=[arch] compiler option default is changed to mic-avx512 to target the Intel® Xeon Phi™ processor x200 product family.

New -prof-gen-sampling, -prof-use-sampling Compiler options

These are new Profile Guided Optimization options for hardware-based event sampling using the Intel® Compiler and the Intel® VTune™ Amplifier.

New -assume contiguous_pointer and -assume contiguous_assumed_shape Compiler options

These are new options to assert that all assumed shape arrays and/or pointers have unit stride.

New -check contiguous Compiler option

The -check contiguous compiler option help to diagnose non-contiguous pointer assignment to CONTIGUOUS pointer. The -check all option includes this check.

New option -fimf-use-svml to force the usage of SVML

New option forces use of SVML where currently LIBM is used, for scalar math. This guarantees bitwise-same result of computations made with vectorized code vs computations made with scalar code. With this feature the compiler vectorizes math functions in -fp-model precise FP model and vectorized code produces results consistent with scalar code results. 

Control-flow Enforcement Technology (CET) support

Control-flow Enforcement Technology (CET) defends a program from certain attacks that exploit vulnerabilities, e.g. Return-oriented Programming (ROP) and similarly Call/Jmp-oriented Programming (COP/JOP). Please refer to the Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 1: Basic Architecture for more details.

New compiler option -cf-potection[=keyword] introduced in the compiler to support CET.

Compile time dispatching for SVML calls

The compiler default behaviour is changed for SVML functions and a call to cpu-specific SVML entry is performed. Specifying new option -fimf-force-dynamic-target reverts to the previous behavior and dynamic SVML dispatching is used.

New -qopt-zmm-usage option

You can tune the zmm code generation done by the compiler with the new additional option -qopt-zmm-usage:low|high. The argument value of low provides a smooth transition experience from Intel® Advanced Vector Extensions 2 (Intel® AVX2) ISA to Intel® Advanced Vector Extensions 512 (Intel® AVX-512) ISA on a Skylake server microarchitecture target, such as for enterprise applications. Tuning for ZMM instruction use via explicit vector syntax such as #pragma omp simd simdlen() is recommended. The argument value of high is recommended for applications, such as HPC codes, that are bounded by vector computation to achieve more compute per instruction through use of the wider vector operations. The default value is low for Skylake server microarchitecture-family compilation targets and high for combined compilation targets.

Support for the new code names for targeting specific microarchitecture

The compiler may generate instructions for processors that support the specified Intel® microarchitecture code name.
Support for the following new code names added to -x, -ax, -mtune, -march and -arch options: 

BROADWELL
CANNONLAKE
HASWELL
ICELAKE
IVYBRIDGE
KNL
KNM
SANDYBRIDGE
SILVERMONT
SKYLAKE
SKYLAKE-AVX512

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Support Deprecated

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Support Removed

Red Hat Enterprise Linux 5* is Not Supported

Support has been removed for installation and use on these operating system versions. Intel recommends migrating to a newer version of these operating systems.

Installation on 32-bit hosts has been removed

Installation on 32-bit hosts has been removed in this release. Support for generating code for 32-bit targets is supported on 64-bit hosts (only) via compiler option -m32.

Support for the Intel® Xeon Phi™ x100 product family coprocessor (formerly code name Knights Corner) is removed in this release

The Intel® Xeon Phi™ x100 product family coprocessor (formerly code name Knights Corner) was officially announced end of life in January 2017.  As part of the end of life process, the support for this family will only be available in the Intel® Parallel Studio XE 2017 version.  Intel® Parallel Studio XE 2017 will be supported for a period of 3 years ending in January 2020 for the Intel® Xeon Phi™ x100 product family.  Support will be provided for those customers with active support.

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Known Issues

Certain uses of OMP THREADPRIVATE with COMMON block name not diagnosed per OpenMP* 4.5 rules

The OpenMP* 4.5 rules states that if a threadprivate directive specifying a common block name appears in one program unit, then such a directive must also appear in every other program unit that contains a COMMON statement specifying the same name. It must appear after the last such COMMON statement in the program unit.  The Intel Fortran compiler does not properly diagnose this.

For example, the following program does not conform to the OpenMP* 4.5 specification and ifort does not diagnose and issue an error for the COMMON statements following the OMP THREADPRIVATE statement according to the rule above.

PROGRAM ex1 
    COMMON /common_blk1/x 
    !$OMP THREADPRIVATE(/common_blk1/) 

    COMMON /common_blk1/y 
    COMMON /common_blk1/z

END PROGRAM 

__INTEL_LIBIRC_DEBUG environment variable

A performance degradation issue may be rarely observed on systems using old Virtual machines software and latest hardware. OS/HW works incorrectly and libirc gets a cache size of 0 from CPUID. In this case a new environment variable  __INTEL_LIBIRC_DEBUG may be set to 1 to allow the runtime to abort and notify the user. It will be possible to identify the root cause and get the information about OS/HW issue by setting this variable.

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Fortran 2008 and Fortran 2015 Feature Summary

The Intel® Fortran Compiler now supports all features from the Fortran 2008 standard. The Intel® Fortran Compiler also supports features from the proposed draft Fortran 2015 standard.  Additional features will be supported in future releases. Features from the proposed Fortran 2015 standard supported by the current version include:

  • Support for all features from “Technical Specification 29113 Further Interoperability with C”, planned for inclusion in Fortran 2015. These include:
    • Assumed type (TYPE(*))
    • Assumed rank (DIMENSION(..))
    • relaxed restrictions on interoperable dummy arguments
    • ISO_Fortran_binding.H C include file for use by C code manipulating “C descriptors” used by Fortran

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Disclaimer and Legal Information

Optimization Notice
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Notice revision #20110804

INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL(R) PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS OTHERWISE AGREED IN WRITING BY INTEL, THE INTEL PRODUCTS ARE NOT DESIGNED NOR INTENDED FOR ANY APPLICATION IN WHICH THE FAILURE OF THE INTEL PRODUCT COULD CREATE A SITUATION WHERE PERSONAL INJURY OR DEATH MAY OCCUR.

Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The information here is subject to change without notice. Do not finalize a design with this information.

The products described in this document may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request.

Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.

Copies of documents which have an order number and are referenced in this document, or other Intel literature, may be obtained by calling 1-800-548-4725, or go to:  http://www.intel.com/design/literature.htm 

Intel processor numbers are not a measure of performance. Processor numbers differentiate features within each processor family, not across different processor families. Go to: 

http://www.intel.com/products/processor%5Fnumber/

The Intel® Fortran Compiler is provided under Intel’s End User License Agreement (EULA). 

Please consult the licenses included in the distribution for details.

Intel, Intel logo, and Cilk are trademarks of Intel Corporation in the U.S. and other countries.

* Other names and brands may be claimed as the property of others.

Copyright © 2019 Intel Corporation. All Rights Reserved.

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