Nios II Processor

These handbooks serve as the primary documentation for the Nios^® II processor.

• The Nios II Gen2 Processor Reference Handbook (PDF) (ver 2015.04.02, April 2015)  answers the question "What is the Nios II Gen2 processor?" and is the primary reference for the Nios II processor architecture.
• The Nios II Gen2 Software Developers Handbook (PDF) (ver 2015.05.19, May 2015)  answers the question  "How do I write programs for the Nios II Gen2 processor?" and is the primary reference for programming the Nios II processor.

 

• The Nios II Classic Processor Reference Handbook (PDF) (ver 2015.04.02, April 2015)  answers the question "What is the Nios II Classic processor?" and is the primary reference for the Nios II processor architecture.
• The Nios II Classic Software Developer's Handbook (PDF) (ver 2015.05.14, May 2015)  answers the question "How do I write programs for the Nios II Classic processor?" and is the primary reference for programming the Nios II processor.

 

• The Embedded Design Handbook (PDF) (ver 2011.July 2011)  describes how to most effectively use the Nios II EDS tools and ihelps to increase the efficiency of developing, debugging and optimizing Nios II based embedded systems.
• The Embedded Peripherals IP User Guide (PDF) (ver 2015.06.12, June 2015)  describes peripherals provided by Altera that work seamlessly with the Nios II processor and are included with Quartus^® II software. 
• The Nios II Floating Point Hardware 2 Component User Guide (PDF) (ver 2015.05.28, May 2015)  describes the floating point custom instruction 2 IP module provided by Altera and included with Quartus^® II software.

 

Other related documents, such as tutorials and application notes, cover specific topics that are not included in the handbooks.

 

Additional Documentation

• Nios II Performance Benchmarks
• Nios II Design Contest Papers
• Nios II Hardware Development
• Software Development
• Qsys System Development
• Legacy Documentation
• Other Related Documentation
• Development Kits/Boards Documentation

 

Related Documentation

Release Notes

• Nios II Embedded Design Suite Release Notes (PDF) (ver 2015.06.17, June 2015, 441 KB)
• Altera IP Release Notes (PDF) (ver 2015.06.30, June 2015, 1418 KB) 
  (All intellectual property (IP) and Nios II release notes are combined into one document)

 

Nios II Hardware Development

• Nios II Flash Programmer User Guide (PDF) (ver 2015.07.01 ) 
  
• AN740: Nios II Flash Accelerator Using MAX10 (ver 2015.06.30) 
• AN391: Profiling Nios II Systems (PDF) (ver 3.0, Jul 2011, 325 KB)
• AN351: Simulating Nios II Embedded Processor Designs (PDF) (ver 1.4, Nov 2013, 375 KB)
  AN351 Software Files (6 KB)
• AN527: Implementing an LCD Controller (ver 1.0, May 2008, 344 KB)
• AN548: Nios II Compact Configuration System for Cyclone^® III (PDF) (ver 1.0, Nov 2008, 320 KB)
  AN548 Example Design Files (597 KB)
• AN595: Vectored Interrupt Controller Usage and Applications (ver 1.0, Nov 2009, 246 KB)
  AN595 Example Design Files(503 KB)
• Using Tightly Coupled Memory with the Nios II Processor Tutorial (ver 2.0, Jul 2011, 1 MB)
  Using Tightly Coupled Memory Tutorial Design Files (15 KB)
• Creating Multiprocessor Nios II Systems Tutorial (ver 2.0, Jun 2011, 1 MB)
• Nios II Hardware Development Tutorial (ver 4.0, May 2011, 1 MB)
  
• Nios II Gen2 Hardware Development Tutorial (ver 2014.09.22)
  Nios II and Nios II Gen2 Hardware Development Tutorial Design Files (14 KB)
• Nios II Custom Instruction User Guide (ver 2.0, Feb 2011, 1 MB) 
  Nios II Custom Instruction Example Design Files (1261 KB)
• Using Nios II Floating-Point Custom Instructions Tutorial (ver 2.0, Feb 2010, 235 KB)
  Using NiosII Floating-Point Custom Instructions Tutorial Design Files (4 KB)
• Nios II 3C25 Microprocessor with LCD Controller Data Sheet (ver 1.1, Mar 2009, 580 KB)
• Nios II 3C120 Microprocessor with LCD Controller Data Sheet (ver 1.1, Mar 2009, 634 KB)

 

Software Development

• Generic Nios II Booting Methods User Guide (ver 2015.06.29) 
• AN741: Remote System Upgrade for MAX 10 FPGA Devices over UART with the Nios II Processor  (ver 2015.06.15, June 2015, 836KB) 
  AN741 Example Design Files
• AN736: Nios II Processor Booting From Altera Serial Flash (EPCQ) (ver 1.0, May 2015, 86KB) 
• AN730: Nios II Processor Booting Methods In MAX 10 Devices (ver 1.0, Jan 2015, 117 KB)       
• AN429: Remote Configuration Over Ethernet with the Nios II Processor (ver 3.0, Apr 2010, 172 KB)
  AN429 Example Design Files (3 MB)
• AN458: Alternative Nios II Boot Methods (ver 2.2, Mar 2014, 441 KB)
  AN458 Example Design Files (36 KB)
• AN459: Guidelines for Developing a Nios II HAL Device Driver (2015.06.12) 
  AN459 Example Design Files (134 KB)
• AN540: Nios II MPU Usage (ver 1.0, Mar 2010, 385 KB)
  AN540 Example Design Files (221 KB)
• AN543: Debugging Nios II Software Using the Lauterbach Debugger (ver 1.0, Apr 2009, 278 KB)
  AN543 Example Design Files (6 MB)
• Nios II IDE Help System (ver 1.7, Mar 2009, 1 MB)
• NicheStack Technical Manuals (PDFs) (ver Apr 2007, 1 MB)
• Accelerating Nios II Networking Applications (ver 2.1, Jan 2013, 265 KB)
• My First Nios II Software Tutorial (ver 2.1, Dec 2012, 986 KB)
• Using Tightly Coupled Memory with the Nios II Processor Tutorial (ver 2.0, Jul 2011, 1 MB)
  Using Tightly Coupled Memory Tutorial Design Files (15 KB)
• Using the NicheStack TCP/IP Stack - Nios II Edition Tutorial (ver 3.0, Jun 2011, 1 MB)
  Using the NicheStack TCP/IP Stack Tutorial Software Files (29 KB)
• Using MicroC/OS-II RTOS with the Nios II Processor Tutorial (ver 3.0, May 2011, 695 KB)
  Using MicroC/OS-II RTOS Tutorial Software Files (7 KB)
• NicheStack Technical Reference Manual (HTML) (ver Apr 2007, 193 KB)

 

Design Guidelines and Applications

• WP01255: Top 7 Reasons to Replace Your MCU with a MAX 10 FPGA (June 2015) 
• Optimize Motor Control Designs with an Integrated FPGA Design Flow (ver 1.2, May 2012, 811 KB)
• AN531: Reducing Power with Hardware Accelerators (ver 1.0, May 2008, 151 KB)
  AN531 Example Design Files (1 MB)

 

Qsys System Development

• Qsys System Design Tutorial (ver 2015.05.04, May 2015, 764 KB)
  Qsys System Design Tutorial Design Example (220 KB)
• Using Tightly Coupled Memory with the Nios II Processor Tutorial (ver 2.0, Jul 2011, 1 MB)
  Using Tightly Coupled Memory Tutorial Design Files (15 KB)
• Creating a System with Qsys (ver 2013.11.4, Nov 2013, 1949 KB)
• Creating Qsys Components (ver 2013.11.4, Nov 2013, 825 KB)
• Qsys Interconnect (ver 2013.11.4, Nov 2013, 1075 KB)
• Optimizing Qsys System Performance (ver QII51024-13.0.0, May 2013, 1561 KB)
• Component Interface Tcl Reference (ver QII51023-13.1.0, Nov 2013, 687 KB)
• Qsys System Design Components (ver 2013.11.4, Nov 2013, 936 KB)

 

Legacy Documentation

• Automated Generation of Hardware Accelerators With Direct Memory Access From ANSI/ISO Standard C Functions (ver 1.0, May 2006, 296 KB)
• AN323: Using SignalTapII Embedded Logic Analyzers in SOPC Builder Systems (ver 1.1, Nov 2007, 386 KB)
• AN346: Using the Nios II Configuration Controller Reference Designs (ver 1.2, Mar 2009, 793 KB)
• AN350: Upgrading Nios Processor Systems to the Nios II Processor (ver 1.1, Jul 2006, 617 KB)
• AN417: Accelerating Functions with the C2H Compiler: Scatter-Gather DMA with Checksum (ver 1.1, Jul 2006, 424 KB)
  AN417 Accelerating Functions Scatter-Gather DMA Example Design Files (6 KB)
• AN446: Debugging Nios II Systems with the SignalTap II Embedded Logic Analyzer (ver 2.0, June 2011, 398 KB)
  AN446 Example Design Files (10 KB)
• AN624: Debugging with System Console Over TCP/IP (ver 1.0, Aug 2010, 424 KB)
• Nios II System Architect Design Tutorial (ver 11.0, June 2011, 2470 KB)
  Nios II System Architect Design Tutorial Design Files (5528 KB)
• SOPC Builder User Guide (ver 1.0, Dec 2010, 2503 KB)
• Nios II C2H Compiler User Guide (ver 1.6, Dec 2009, 911 KB)
  dma_c2h_tutorial.c   Tutorial design file for Nios II C2H Compiler User Guide (2 KB)
• Adding Hardware Accelerators to Reduce Power in Embedded Systems (ver 1.0, Sep 2009, 722 KB)
• Accelerating Nios II Systems with the C2H Compiler Tutorial (ver 1.3, Aug 2008, 803 KB)
  Design files for Stratix II and Cyclone II boards (387 KB)

 

Other Related Documentation

• Nios II Performance Benchmarks (ver 2015.07.06, Jul 2015)
• Avalon Verification IP Suite User Guide (ver 2015.06.04, Jun 2015, 2 MB)
  (Includes Qsys tutorials for Verilog HDL and VHDL)
  Avalon Verification IP Suite Design Files (46 KB)
• NicheStack Technical Manuals (PDFs) (ver , Apr 2007, 1 MB)
• NicheStack Technical Reference Manual (HTML) (ver , Apr 2007, 193 KB)