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PCI Express* Architecture

The Intel® Developer Network for PCI Express* Architecture is a developer community offering access to resources and peers.

Intel® 5000P Chipset MCH BSDL

BSDL file: The Intel® 5000P chipset MCH BSDL with the latest stepping (B3 and G1) for the Intel® Xeon® Processor 5000 series. (v.1, Oct. 2006)

Salesforce Discusses Benefits of HP 3PAR StoreServ* Storage

Salesforce shares how they get their data moving with HP 3PAR StoreServ* storage—based on Intel® technology—to prevent performance bottlenecks.

Intel® Xeon® Processor 5600 Series Specification Update

Specification Update: Intel® Xeon® processor 5600 series errata, specification clarifications, and changes.

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Intel® Xeon® Processor 5500 Series Specification Update

Specification Update: Intel® Xeon® processor 5500 series errata, specification clarifications, and changes.

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Intel® 5520/5500 Chipset IOH: Spec Update

Specification Update: Intel® 5520/5500 chipset covers errata, specification changes and clarifications, identification info, and document changes.

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Swift* with Erasure Coding for Storage

Erasure coding extends Swift* storage capabilities to improve data availability through parity, reducing cost and storage requirements.

英特尔® 存储技术和产品

淘汰传统的存储技术子系统,充分利用优化的技巧使用英特尔® 存储解决方案管理数据增长。

Hybrid PCB Stack-up: Optimization of Cost and Loss Performance

Design Guide: Hybrid PCB stack-up helps improve signal integrity performance for high-speed signaling at lower cost than an all low loss stack-up.

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