英特尔® 845 芯片组: 面向 DDR 的 82845 芯片组内存控制器集线器(MCH)

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Intel® 845 Chipset: 82845 Memory Controller Hub (MCH) for DDR

Intel® 845 Chipset: 82845 Memory Controller Hub (MCH) for DDR Datasheet, January 2002

The Intel® 82845 Memory Controller Hub (MCH) is designed for use with the Intel® Pentium® 4 processor in the 478-pin package. The Intel® 845 chipset contains two main components: the Intel 82845 Memory Controller Hub (MCH) for the host bridge and the Intel 82801BA I/O Controller Hub (ICH2) for the I/O subsystem. The MCH provides the processor interface, system memory interface, AGP interface, and hub interface in an 845 chipset desktop platform.

This document describes the 82845 Memory Controller Hub (MCH) for use with DDR (Double Data Rate) memory devices. Section 1.3 provides an overview of the 845 chipset.

Intel® 845 Chipset System Architecture

The MCH provides the processor interface, system memory interface, AGP interface, and hub interface in an 845 chipset desktop platform. The processor interface supports the Pentium 4 processor subset of the Extended Mode of the Scalable Bus Protocol. The MCH supports a single channel of DDR200/266. The MCH contains advanced power management logic. The 845 chipset platform supports the I/O Controller Hub 2 (ICH2) to provide the features required by a desktop platform.

Read the full Intel® 845 Chipset Datasheet.